{
  "ok": true,
  "name": "Lattice Gazette",
  "patents": 89,
  "advertisement": {
    "id": "drafter",
    "label": "Advertisement",
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    "advertiser": "Drafter & Co.",
    "headline": "Diagrams that emit Verilog.",
    "body": "A drawing board that lowers to synthesizable RTL. No second source of truth, no late rewrite into HDL.",
    "cta": "See the board",
    "url": "/inventory#ad-drafter",
    "format": "Full-width 88px",
    "channel": "display",
    "sandbox": true
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}