{
  "name": "Lattice Gazette",
  "version": "1.0.0",
  "description": "A public, agent-readable atlas of patents covering graphical programs, formal specifications, and the compilers that lower them onto CPUs and programmable hardware.",
  "url": "https://lattice-gazette.pages.dev",
  "supportedInterfaces": [
    "mcp",
    "http-json",
    "markdown",
    "x402"
  ],
  "defaultInputModes": [
    "text"
  ],
  "defaultOutputModes": [
    "text",
    "application/json"
  ],
  "capabilities": {
    "streaming": false,
    "tools": true,
    "markdown": true,
    "payments": true
  },
  "skills": [
    {
      "id": "search-patents",
      "name": "Search patents",
      "description": "Find prior art on diagram-to-hardware compilation.",
      "tags": [
        "patents",
        "fpga",
        "graphical-programming"
      ]
    },
    {
      "id": "landscape",
      "name": "Landscape",
      "description": "Summarize claim clusters across the six families.",
      "tags": [
        "prior-art"
      ]
    },
    {
      "id": "buy-inventory",
      "name": "Buy inventory",
      "description": "Negotiate and pay for advertising placements via AdCP and x402.",
      "tags": [
        "ads",
        "x402",
        "negotiation"
      ]
    }
  ],
  "advertisement": {
    "id": "drafter",
    "label": "Advertisement",
    "placement": "catalog-strip",
    "advertiser": "Drafter & Co.",
    "headline": "Diagrams that emit Verilog.",
    "body": "A drawing board that lowers to synthesizable RTL. No second source of truth, no late rewrite into HDL.",
    "cta": "See the board",
    "url": "/inventory#ad-drafter",
    "format": "Full-width 88px",
    "channel": "display",
    "sandbox": true
  }
}